1. Field of the Invention
The present invention relates to a pattern matching technology. Particularly, the present invention relates to a pattern matching apparatus and a semiconductor inspection system which inspect patterns formed on a wafer by utilizing an image obtained by photographing a semiconductor device and CAD data for the semiconductor device.
2. Description of the Related Art
In recent years, there have been situations where manufacture of semiconductor devices is difficult because miniaturization and multilayering thereof have been progressed, and because logic thereof has been more complicated. As a result, there has been a tendency that failures thereof attributed to manufacturing processes occur frequently, and it has been important to accurately detect positions of the respective failures through inspection. The failures attributed to the manufacturing processes include pattern deformation due to an inappropriate light-exposure condition in a lithography process and a conduction failure due to a layer-to-layer misalignment. Locations of the respective failures of a semiconductor device can be detected through comparison and collation between CAD (Computer Aided Design) data for the semiconductor device and an actual pattern formed on a wafer.
Note that the CAD data is design data for the semiconductor device, and is data for determining a layout of patterns formed on the semiconductor device. While various data formats such as GDS and OASIS exist for the CAD data, these data formats commonly adopt what is termed as vector data format in which groups of characteristic points are described. This is because an amount of information on the patterns has been enormous as a result of high integration of the semiconductor devices. With any one of these formats, shapes of the patterns are recognized by having a semiconductor manufacturing apparatus or a semiconductor inspection apparatus, which utilizes the CAD data, render straight lines between the characteristic points.
As technologies for inspecting patterns by utilizing images from such CAD data and those of a semiconductor device, known are ones described in JP Hei 7-260699A and JP 2000-293690A.
For the purpose of automatically detecting a misalignment amount of a stage which transfers the semiconductor device to a photographing position of a microscope, these technologies are configured to performing a pattern matching process on patterns extracted from a photographed image and CAD data on patterns in an inspected position or CAD data on patterns whose positional relationship with the patterns in the inspected position is known, and to thereby detect positions in the image corresponding to that in the CAD data. As to this stage, an amount of movement thereof is controlled in a way that each of actual patterns, which corresponds to one of patterns in the CAD data, is centered in the photographed image. Accordingly, a distance between the detected position and a central position of the image is the misalignment amount. Based on this misalignment amount, each of the patterns in the inspected position is identified and measured.
However, pattern matching methods applied to the technologies described respectively in the aforementioned patent documents are configured to access geometric resemblance between patterns included in the CAD data and those included in the photographed image. Consequently, inspection can be performed with high accuracy when a degree of resemblance between a shape of each pattern in the CAD data and that on the semiconductor device is high. In this event, however, the following problem arises. When a shape of one of the patterns in CAD data and that formed on the semiconductor device are largely different from each other because of miniaturization, as in the case with a hole pattern, it is difficult to access a degree of resemblance between the positions of the respective patterns. Consequently, a position of the pattern in the image cannot be detected accurately, the position corresponding to a position of the pattern in the CAD data.
For example, FIG. 2A is a view showing CAD data on hole patterns. FIGS. 2B and 2C are views each showing an image obtained by photographing hole patterns, which is formed on a silicon wafer, by use of a scanning electron microscope (SEM). Pattern matching is performed by detecting, from any one of the images of FIGS. 2B and 2C, a region matching with that in the CAD data.
As to a shape of a hole pattern, a shape of an angular portion of a rectangle seen in a hole pattern in the CAD data cannot be reproduced due to a performance limit of an aligner, and the hole pattern is formed on the silicon wafer in a nearly circular shape. Additionally, due to variations in light-exposure conditions, the diameters of the respective hole patterns can be smaller as in the case shown in FIG. 2B, or be larger, as in the case shown in FIG. 2C, than the diameter of the hole pattern in the CAD data. Thus, each of shapes of a corresponding one of hole patterns in the CAD data and that of the hole patterns actually formed are largely different from each other. For this reason, as in the cases shown in FIGS. 2D and 2E, a deviation occurs between positions of the respective hole patterns in the CAD data and those of the hole patterns extracted from the image data. It is therefore difficult to accurately detect positions of the respective hole patterns in the image.